CZ120 memory expansion module

Memory capacity for the data center using the CXL™ standard

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Flexible memory capacity expansion for data-intensive workloads

Memory capacity expansion that optimizes cost and performance balancing compute and memory resources intelligently.

Ability to scale servers with high-capacity CXL standards-based memory

CZ120 memory expansion module using Compute Express Link™ (CXL) enables server OEMs to scale, integrate and expand memory capacity for a multitude of application workloads.

Optimized performance beyond the direct-attach memory channels

Flexibility to compose servers with higher memory capacity and low latency to meet application workload demands with up to 24%1 greater memory bandwidth per core versus RDIMM only.

Lower total cost of ownership (TCO)

Greater utilization of compute and memory resources for bounded applications, reducing CapEx and OpEx.

Technology Enablement Program for Micron memory expansion using CXL

The Technical Enablement Program (TEP) for memory expansion using CXL offers a path into Micron to gain early access to technical information and support, electrical and thermal models, as well as memory products to aid in the design, development and introduction of next-generation computing platforms.

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The future of the data center

The data center is at the heart of modern society.​ It supports a continuum of applications and services, from social networking to medical science. See how Micron is playing a key role in the evolution of the data center to ensure the future can handle the challenges ahead.

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Frequently asked questions

CXL (Compute Express Link) is a high-speed interconnect, industry-standard interface for communications between processors, accelerators, memory, storage, and other IO devices.

CXL increases efficiency by allowing composability, scalability, and flexibility for heterogeneous and distributed compute architectures. CXL allows applications to share memory among CPU, GPU and FPGA devices which enables sustainability leading to accelerated compute.

Type 1 ( CXL device

This protocol is used for device initialization, link-up, enumeration and device discovery. It is used for devices like FPGAs and IPUs that support Type 1 devices implement a fully coherent cache but no host-managed device memory.

Type 2 (CXL.cache) CXL device

This protocol implements an optional coherent cache and host-managed device memory. Typical applications are devices that have high-bandwidth memory attached.

Type 3 (CXL.mem) CXL device

This protocol is used only for host-managed device memory. Typical applications are as memory expanders for the host.

Established in 1999 by Micron Technology, the Micron Foundation is a private nonoperating corporate foundation with an endowment fund. It is recognized as a 501(c)(3) organization by the IRS.

Modern compute architectures are prone to the “memory wall” problem. CXL provides the necessary architecture to bring balance to the compute and memory scaling gap. It creates a new vector to achieve economically viable memory solutions through memory expansion, impacting DRAM bit growth rate.

Additionally, CXL’s flexible and scalable architecture provides higher utilization and operational efficiency of compute and memory resources to scale-up or scale-out resources based on workload demands.

To learn more on Micron’s perspective on the impact of CXL on DRAM bit growth rate, read our white paper.

Modern parallel computer architectures are prone to system bottlenecks that limit performance for application processing. Historically, this has been known as the “memory wall”, where the rate of improvement in microprocessor performance far exceeds the rate of improvement in DRAM memory speed.

CXL protocol properties for memory-device cohesion and coherency address the memory wall by enabling memory expansion beyond server DIMM slots. CXL memory expansion serves as a two-prong approach by adding bandwidth to overcome the memory wall as well as adding capacity for data-intensive workloads for CXL-enabled servers.

CXL attached memory provides tremendous opportunity for growth in new areas for tiered memory storage and enabling memory scaling independent of CPU cores. CXL will help sustain a higher rate of DRAM bit growth, but don’t expect CXL to cause an acceleration in DRAM bit growth. Overall, it’s a net positive for DRAM growth.

Micron’s commitment to CXL technology enables customers and suppliers to drive the ecosystem for memory innovation solutions. To learn more on how Micron is enabling next-generation data center innovation on our data center solution page.

CXL is a cost-effective, flexible, and scalable architectural solution that will shape the data center of the future. It will change how traditional rack and stack architecture of servers and fabric switches are deployed in the data center.

Purpose-built servers that have dedicated fixed resources comprised of CPU, memory, network and storage components will give way to these more flexible and scalable architectures. Servers in the rack – once interconnected to fixed resources for network, storage and compute – will be dynamically composed to meet the demands of modern and emerging workloads such as AI and deep learning. Eventually, the data center will migrate towards complete disaggregation of all server elements, including compute, memory, network, and storage.

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1. MLC bandwidth using 12-channel 4800 MT/s RDIMM + 4 x 256GB CZ120 vs. RDIMM only.

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